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J-Link Flash Download

Flash Download

J-Link Flash Download

 

J-Link comes with a set of highly speed-optimized built-in flashloaders which allow fast download of applications, directly into the flash memory of your target system. This flash memory can be internal, on-chip flash memory or external CFI-compliant NOR flash memory.

And the best of all: This feature is free of charge.

What makes J-Link's built-in flash programming so much faster ?

The flashloaders which come with the J-Link software (JLinkARM.dll) are a set of so-called "RAMCodes" which are small programs that include the logic for erasing and programming the flash memory. These RAMCodes are downloaded into and are executed in the RAM of the target system.

But the flash-algorithm itself is not the only thing which makes the J-Link flashloaders so extremely fast. In addition to this, only the flash-sectors which are needed to be programmed are programmed by J-Link.

What does this mean?: By default, the J-Link DLL is configured to check if the same application which is intended to download, is already present in the flash of the target memory. If this is the case, the flash download it skipped which saves a lot of time. The process of checking if the target application is already in flash is also a highly speed-optimized process since this check is performed by a CRC comparison.

Moreover, if you are debugging, usually your target application continuously changes and the debug session is terminated and re-started multiple times. J-Link is also able to detect only small changes in your target application which means that only the parts which have been changed are re-downloaded if the debug session is re-started.

To get a better idea of what difference the above mentioned logic makes, in the following you will find a speed comparison test which has been performed with the J-Link flash download.

For the speed comparison test, a standard IAR EAWRM sample project and the maximum supported JTAG frequency (usually 12 MHz) has been used. All time values have been taken from the point where downloading starts until the debugger is ready to start debugging (application arrived at main()).

 

Emulator Settings Download-Time
Toshiba TMPM330FDFG, 512 KB application size
J-Link V8 J-Link commander1 5 sec. (102 KB/s)
J-Link Ultra J-Link commander1 4.2 sec. (122 KB/s)
J-Link V8 IAR EWARM flashloader 10.6 sec. (48 KB/s)
J-Link V8 SEGGER flashloader,
flash content completely different from application
9.5 sec. (54 KB/s)
J-Link V8 SEGGER flashloader,
flash content almost identical to application
(only the value of a constant variable has been changed)
7.8 sec. (66 KB/s)
J-Link V8 SEGGER flashloader,
flash content identical to application
2.8 sec. (183 KB/s)
Freescale MK40X256VMD100 (Cortex-M4 Kinetis), 256 KB application size
J-Link V8 J-Link commander2 8.3 sec. (31 KB/s)
J-Link Ultra J-Link commander2 7.5 sec. (34 KB/s)
J-Link V8 IAR EWARM flashloader 16.7 sec. (15.3 KB/s)
J-Link V8 SEGGER flashloader,
flash content completely different from application
16.4 sec. (15.6 KB/s)
J-Link V8 SEGGER flashloader,
flash content almost identical to application
(only the value of a constant variable has been changed)
3.9 sec. (65.6 KB/s)
J-Link V8 SEGGER flashloader,
flash content identical to application
2.8 sec. (91 KB/s)
ST STM32F103ZE, 512 KB application size
J-Link V8 J-Link commander3 25.8 sec. (20 KB/s)
J-Link Ultra J-Link commander3 25.8 sec. (20 KB/s)
ST-Link IAR EWARM flashloader 45 sec. (11.4 KB/s)
J-Link V8 IAR EWARM flashloader 28 sec. (18.3 KB/s)
J-Link V8 SEGGER flashloader,
flash content completely different from application
26 sec. (20 KB/s)
J-Link V8 SEGGER flashloader,
flash content almost identical to application
(only the value of a constant variable has been changed)
9.7 sec. (53 KB/s)
J-Link V8 SEGGER flashloader,
flash content identical to application
5.5 sec. (93 KB/s)

1J-Link commander has been used as follows:
speed 20000
exec device = TMPM330FDFG
loadbin C:\TMPM330.bin,0

2J-Link commander has been used as follows:
speed 20000
exec device = MK40X256VMD100
loadbin C:\MK40.bin,0

3J-Link commander has been used as follows:
speed 20000
exec device = STM32F103ZE
loadbin C:\STM32.bin,0x08000000

Why do the speeds differ between different devices with the same CPU core?

Download speed into RAM is identical for all devices, but flash programming speed depends heavily on the flash technolgy and flash controller used. On most devices, J-Link speed is so high that the limiting factor is the time that it takes to erase the flash memory and to copy the data from RAM to flash.

Does the data above include the time it takes to erase the flash?

Yes, in all cases in which the flash is programmed the required sectors are also erased. This time is included.

Debuggers with support for J-Link flash download:

Currently, the flash download feature of J-Link is supported by the following debuggers/workbenches:

  • IAR Embedded Workbench for ARM (IAR EWARM)
  • Keil RealView MDK
  • Yagarto GNU ARM Toolchain (free) + J-Link GDB Server
  • GNU Debugger (GDB) + J-Link GDB Server
  • RDI + any RDI compliant debugger

But in general, the flash download feature can be used with every workbench which supports J-Link, since even if it is not possible to select your target device in the debugger, you can always select it in the J-Link control panel, which is opened when a debug session starts.

Download into flash memory for production purposes

  • Flasher ARM - Stand-alone flash programming solution. Flasher ARM is a programming tool for ARM/Cortex devices with internal or external flash memory. Flasher ARM is designed for programming flash targets with the J-Flash software or stand-alone. Flasher ARM can also operate as a normal J-Link.
  • J-Flash - Complete flash programming solution. J-Flash is a Windows application, which can program internal and external flash on ARM/Cortex devices. J-Flash can be used as a GUI-based application or in batch mode.
  • J-Link Flash SDK - An enhanced version of the J-Link SDK, which comes with an DLL with API functions for flash programming (erase, program verify). Ideally for customers which are planning to built their own application for production process.

Enabling J-Link built-in flashloaders in different debuggers

Usually, in order to enable the J-Link built-in flashloaders you only need to disable the debugger's flashloader. Since the built-in flashloaders of J-Link make flash behave as RAM , when the debugger writes to the target memory, the J-Link DLL automatically detects if the memory range which is written in flash memory or not. If the affected memory area is in flash memory, the J-Link flashloader will become active and performs the programming of the flash memory automatically in a very short time. Please note that the correct device has to be selected in the debugger in order to tell J-Link which device is intended to be programmed.

The following screenshot illustrates how to disable the IAR EWARM flashloader, in order to use the J-Link built-in flashloader.

 

J-Mem

J-Mem

 

J-Mem is a small (app. 50 kb) stand-alone application for Microsoft Windows 2000 and Windows XP. It requires a J-Link connected to the USB port and an ARM system connected to J-Link via the JTAG interface.
J-Mem displays memory contents of ARM-systems and allows modifications of RAM and sfrs (Special function registers) while target is running. It makes it possible to look into the memory of an ARM chip at run time; RAM can be modified and sfrs can be written. The type of access for both read and write access can be selected to be 8/16/32 bit.
It works nicely when modifying sfrs, especially because it writes the sfr only after the complete value has been entered.

License & Disclaimer

The program is freeware and can be redistributed without limitation. It is provided free of charge, and, therefore, on an "as is" basis, without warranty of any kind, including - without limitation - the warranties that it is free of defects, merchantable, fit for a particular purpose or non-infringing. The entire risk as to the quality and performance of the software is borne by user.

 

Preparing J-Link to supply power

JTAG Isolator

JTAG Isolator

 

The J-Link JTAG Isolator can be connected between J-Link and any ARM-board that uses the standard 20-pin JTAG-ARM connector to provide electrical isolation. This is essential when the development tools are not connected to the same ground as the application. It is also useful to protect the development tools from electrical spikes that often occur in some applications, such as motor control applications. Another typical field of application is development of products with sensors or other analog circuitry, in which case the target hardware is protected from electrical noise originating from the development PC.
This product is compatible with J-Link, J-Link Pro and Flasher ARM.

Documentation download

Power supply

Both sides, target and emulator, are totally isolated from each other and separately powered. The target side draws power from pins 1 or 2, the emulator side draws power from pin 19.

Features

  • 1kV DC isolation
  • 3.3V and 5V target operation supported
  • Powered from emulator and target
  • JTAG standard 20-pin connection supporting TRST, TDI, TMS, TCK, RTCK, TDO and RESET signals
  • Power consumption on target side: < 50mA
  • JTAG frequency: Up to 4MHz
  • 3 LEDs to indicate emulator power, target power and target RESET

Connectors and indicators

The JTAG Isolator uses high speed optocouplers that allow a very low propagation time between input and output. It comes with the following connectors and indicators:

  • 20-pin female EMULATOR connector which can be plugged directly into J-Link
  • 20-pin male TARGET connector for connection of the target cable
  • Green LED indicating power on the emulator side
  • Green LED indicating power on the target side
  • Red LED indicating RESET

Block diagram

The following functional block diagram illustrates the functional connections between the emulator and target.

Target connector

The following picture shows the target side pinout of the J-Link JTAG Isolator:

The Emulator side of the Isolator is plugged directly into the Emulator. The Target side is connected to the target via a 20-pin flat cable.

 

Pin Signal Type Description
1 VCC Output The target side of the isolator draws power over this pin.
2 VCC Output The target side of the isolator draws power over this pin.
3 nTRST Output JTAG Reset. Output from J-Link to the Reset signal on the target JTAG port.
Typically connected to nTRST on the target CPU. This pin is normally pulled HIGH on the target to avoid unintentional resets when there is no connection.
5 TDI Output JTAG data input of target CPU.
It is recommended that this pin is pulled to a defined state on the target board.
Typically connected to TDI on target CPU.
7 TMS Output JTAG mode set input of target CPU.
This pin should be pulled up on the target.
Typically connected to TMS on target CPU.
9 TCK Output JTAG clock signal to target CPU.
It is recommended that this pin is pulled to a defined state on the target board.
Typically connected to TCK on target CPU.
11 RTCK Input Return test clock signal from the target.
Some targets must synchronize the JTAG inputs to internal clocks. To assist in meeting this requirement, you can use a returned, and re timed, TCK to dynamically control the TCK rate. J-Link supports adaptive clocking, which waits for TCK changes to be echoed correctly before making further changes. Connect to RTCK if available, otherwise to GND.
13 TDO Input JTAG data output from target CPU.
Typically connected to TDO on target CPU.
15 RESET I/O Target CPU reset signal. Typically connected to the RESET pin of the target CPU, which is typically called "nRST", "nRESET" or "RESET".
17 N/C N/C This pin is not connected on the target side of the isolator.
19 N/C N/C This pin is not connected on the target side of the isolator.

 

Pins 4, 6, 8, 10, 12, 14, 16, 18, 20 are GND pins connected to GND.

Using the Isolator with J-Link

In order to use the Isolator, follow these steps:

  • Plug the Isolator directly into J-Link.
  • Power J-Link.
  • Make sure the green LED on the emulator side is lit. If it is not, follow the instruction in the previous section
  • Connect the target to the target side of the Isolator
  • If the target is powered, the green LED on the target side should be lit

The red LED on the target side is lit when a Target RESET is active (low).

Preparing J-Link to supply power

J-Link needs to supply 5V power to the emulator side of the adapter on pin 19. In order to do this, you may have to configure J-Link once as follows:

  • Make sure that SEGGER J-Link software is installed on your machine. It can be downloaded from here
  • Start J-Link Commander, which can be found under “Start -> Programs -> SEGGER -> J-Link ARM”
  • Enter the following command: power on perm
  • Plug in the adapter: The LED on the emulator side should now be lit

Using the Isolator with another ARM emulator

The Isolator has been designed for J-Link, but can also be used with other ARM emulators with the same pin-out. In this case, you should make sure that 5V are supplied to pin 19 of the emulator connector and that your emulator is not damaged when applying 5V to this pin. Do this at your own risk!

 

Model comparison

Model comparison

Model comparison

 

The following tables show the features which are included in each J-Link / J-Trace model.

Hardware features

Software features are features implemented in the software primarily on the host. Software features can either come with the J-Link or be added later using a license string from Segger.

Hardware features
J-Link J-Link Pro J-Link Ultra J-Trace for Cortex-M3 J-Trace
USB
Ethernet no no no no
Supported cores ARM7
(no tracing)
ARM9
(no tracing)
ARM11


(no tracing)


(no tracing)

Cortex-A5
(no tracing)

(no tracing)
Cortex-A8
(no tracing)

(no tracing)
Cortex-M0
(no tracing)
Cortex-M1
(no tracing)
Cortex-M3
(no tracing)
Cortex-M4
(no tracing)
Cortex-R4
(no tracing)

(no tracing)
Renesas RX
(no tracing)

(no tracing)
JTAG
SWD no
SWO no
ETM Trace no no no
Software features
J-Flash
(optional)


(optional)

(optional)

(optional)
Flash Breakpoints2
(optional)

(optional)

(optional)

(optional)
Flash Download1
GDB Server
(optional)

(optional)

(optional)

(optional)
RDI
(optional)

(optional)

(optional)

(optional)

1 Most IDEs come with their own flashloaders, so in most cases this feature is not essential for debugging your applications in flash. The J-Link flash download (FlashDL) feature is mainly used in debug environments where the debugger does not come with an own flashloader (e.g. the GNU Debugger). For more information about flash breakpoints, please refer to Flash Download.

2 The flash breakpoint feature allows setting an unlimited number of breakpoints even if the application program is not located in RAM, but in flash memory. Without this feature, the number of breakpoints which can be set in flash is limited to the number of hardware breakpoints (typically two for ARM 7/9, six for Cortex-M3). For more information about flash breakpoints, please refer to Flash Breakpoints.

 

J-Link performance comparison

Performance comparison

J-Link performance comparison

 

The following table lists performance values of popular JTAG emulators for download into RAM of ARM7 CPUs:

Product Peak download speed [KByte/sec]
Segger J-Link Ultra 1440
Segger J-Link 720
Segger J-Link Lite 280
Ronetix PEEDI 409
Hitex Tanto 400
Abatron BDI2000 340
Rowley CrossConnect for ARM 200
Abatron BDI1000 170
Amontec JTAGkey 135
ARM RealView Multi-ICE 130
Hitex Tantino 130

All download speeds are taken from specifications found on manufacturer's website on March 20, 2007. If different values have been found, the highest one has been used. Please note that the actual speed depends on various factors, such as JTAG, clock speed, host CPU core etc.

Measuring J-Link download speed

JLink.exe has been used to measure performance. The hardware consisted of:

  • PC with 2.6 GHz Pentium 4, running Win2K
  • USB 2.0 port
  • USB 2.0 hub
  • J-Link
  • Target with ARM7 running at 50 MHz

A screenshoot of J-Link Commander shows how the measuresment has been performed.